• Skip to main content

HLS Hackathon

July 2, 2025 - October 31, 2025

Accelerating Inferencing Using HLS Hackathon

Learn More!

HLS Webinar

Tuesday, Sep 30th-9:00 AM PDT

Hardware design of custom AI accelerators using HLS

Register now
SIEMENS HLS Academy
  • Log In
  • Register
  • Topics

    HLS Academy offers users multiple entry points to find the information they need. One of these entry points is through our Topic collection. These topics address the critical issues designers need to understand to fully leverage the capabilities of High-Level Synthesis and Verification. While we continue to add new topics, users are encouraged to further refine collection information to meet their specific interests.

    • HLS Basics
    • HLS Building Blocks & IP
    • Languages
    • Verification
    • Methodologies & Applications
    • All Topics
    HLS Basics
    • HLS 101
    • Loop Unrolling
    • Pipelining
    • Hierarchy
    • Design Partitioning
    • Data Types
    • Interfaces
    HLS Building Blocks & IP
    • Arithmetic Functions
    • Datapath
    • Control Logic & FSM
    • Memories
    • Channels & Bus Interfaces
    • IP
    • Open-Source Foundation libraries
    Languages
    • C++ Modeling
    • SystemC Modeling
    Verification
    • High-Level Verification
    • High-Level Static and Formal Verification
    Methodologies & Applications
    • HLS FPGA
    • Processor Accelerators
    • MathWorks
    • AI/ML Accelerators & Design
    • Image/Video Processors & Design
  • All Content

    Browse all content in the HLS Academy

    • By Type
    • All Content
    By Type
    • Resource
    • Session
    • Track
  • Forums

    • Forums
    • Discussions by Top Tags
    • By Topic Status
    • All Forums
    Forums
    • HLS Basics
    • HLS Building Blocks & IP
    • Languages
    • Verification
    • Applications
    Discussions by Top Tags
    • HLS 101
    By Topic Status
    • Latest
    • Solved
    • Unsolved
  • More

    • HLS Academy
    • Siemens EDA
    HLS Academy
    • About Us
    • Contact Us
    Siemens EDA
    • Events & Webinars
    • HLS Resources
    • On-Demand Training
    • On-Demand Training Certification

Breadcrumbs

  1. Home
  2. Topics

Data Types

Bit-accurate data types offer a reliable mechanism to model exact hardware bit-widths and arithmetic precision in High-Level Synthesis (HLS) workflows. These types range from simple signed and unsigned integer representations, familiar to RTL designers, to fixed point data types with support for rounding and saturation modes, and even fully IEEE-compliant floating-point types with user-defined exponent and mantissa widths. This level of control ensures bit-exact behavior, maintaining alignment between C++/SystemC numerical models and the final RTL generated by the HLS tool.
Some organizations use proprietary or custom-developed bit-accurate types for modeling. However, two widely available open-source options are AC types and SystemC types they support robust C++/SystemC design styles and offer comprehensive integer and fixed-point modeling capabilities. AC Types have become especially popular due to their support for unlimited bit-length, consistent simulation semantics, and faster execution performance in compiled environments.

Stuart Clubb

SIEMENS Siemens Digital Industries Software
Portfolio
  • View all portfolio
Explore
  • Community
  • Blog
  • Online Store
  • Glossary
Siemens
  • About Us
  • Careers
  • Events
  • News and Press
  • Partners
  • Trust Center
Contact
  • HLS - Contact Us
  • VA - Contact Us
  • PLM - Contact Us
  • EDA - Contact Us
  • Worldwide Offices
  • Support Center
  • Give us Feedback
  • Report piracy

© Siemens 2025

  • Terms of Use
  • Privacy Policy
  • Cookie Statement
  • DMCA
  • Whistleblowing