Computer Vision: The Basics of How HLS Can Be Used to Accelerate from Algorithm to FPGA/ASIC for High-Performance Vision Processing

High-Level Synthesis (HLS) has been used in multiple companies, projects and designs targeting vision processing in autonomous car projects. HLS is the fastest way to turn complex algorithms into efficient HW implementation and also create a methodology that enables design teams to rapidly react to changes in algorithm or functional specification and still make demanding schedules. This session explores how HLS works and why HLS is such a good fit for image processing and vision applications.