SIEMENS HLS Academy

MatchLib Toolkit

MatchLib is a new open-source SystemC library originally developed by NVIDIA Research to enable digital hardware to be accurately and efficiently designed and verified at a high level of abstraction, leveraging commercial High-Level Synthesis tools.

Stuart Swan

  1. Introduction

    Introduction

    Some of the key goals of MatchLib are to provide a highly configurable library of HW components that can be directly synthesized to HW with very high quality of results, and to enable very accurate performance simulation of these models in SystemC prior to synthesis, so that the overall design and verification effort is much more efficient. MatchLib contains models for commonly used HW components such as AXI bus fabric components (routers, arbiters, etc), network on chip components, banked memories, crossbars, etc.

    MatchLib is being actively used by hardware design teams in both industry and academia for advanced hardware design projects, and multiple tapeouts from different groups have occurred for chips that have been almost entirely designed with MatchLib.

  2. MatchLib Toolkit Resources

    The MatchLib related reference implementation, library code and code examples are available for download below.

    • MatchLib Examples Kit For Accellera Synthesis

      SystemC Modeling Mar 14, 2024 Stuart Swan link

      This kit contains complete source code to enable you to build and run a representative set of MatchLib examples without needing any EDA tool installations or any other downloads. The examples run on the open source Accellera SystemC simulator, which is included in this kit.

    • Machine-Learning-Assisted Agile VLSI Design for Machine Learning

      SystemC Modeling Aug 31, 2019 Brucek Khailany link

      We will highlight two design automation research directions being pursued in the ASIC and VLSI Research group at NVIDIA: (1) An automated C++-to-layout VLSI flow that leverages HLS tools and open-source HLS-compatible C++ libraries for design productivity; and (2) Machine-learning assisted VLSI design techniques. We will also describe our experience using these tools as part of an agile hardware design flow to build for a deep neural network (DNN) inference accelerator testchip.

    • NVIDIA's Use of Catapult HLS for Building ML Inference Accelerators

      SystemC Modeling Nov 29, 2023 Stuart Swan link

      This is a short introduction to NVIDIA's use of Catapult HLS for building machine learning accelerator SOCs. We will present the MatchLib modeling methodology that NVIDIA has developed and which is now supported within Catapult HLS, and we will describe the results of the fully working SOC ASIC that was almost entirely developed using HLS.