Design and verification using High-Level Synthesis (HLS) software
HLS software adoption has been driven primarily by the advantages that raising the level of abstraction of design has on reducing the ever-increasing costs of functional verification. This paper presents an overview of the design, optimization, and verification using HLS. It also outlines some of the requirements for HLS design to fit into existing design and verification flows and ways in which such flows might be adapted as HLS is more widely deployed.
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Design and verification using High-Level Synthesis
The adoption of High-Level Synthesis (HLS) has been driven by the need to tackle growing verification costs in traditional RTL design flows. This paper presents an overview of design, optimization and verification using HLS. It also outlines some of the requirements for HLS design to fit into existing design and verification flows and ways in which such flows might be adapted as HLS is more widely deployed.
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